# Download Foundation of Switching Theory and Logic Design: (As Per by Arun Kumar Singh PDF

By Arun Kumar Singh

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Extra info for Foundation of Switching Theory and Logic Design: (As Per JNTU Syllabus)

Example text

A system that can not guarantee that the data received by one device are identical to the data transmitted by another device is essentially useless. Yet anytime data are transmitted from source to destination, they can become corrupted in passage. Many factors, including external noise, may change some of the bits from 0 to 1 or viceversa. Reliable systems must have a mechanism for detecting and correcting such errors. Binary information or data is transmitted in the form of electromagnetic signal over a channel whenever an electromagnetic signal flows from one point to another, it is subject to unpredictable interference from heat, magnetism, and other forms of electricity.

In the first step; we place each bit of original data unit in its appropriate position in the 11-bit unit. For example, let the data unit be 1001101. In the subsequent steps; we calculate the EVEN parities for the various bit combinations. The even parity value for each combination is the value of corresponding r bit. For example, the value of r1 is calculated to provide even parity for a combination of bits 3, 5, 7, 9 and 11. , 1011 1001 0111 0101 0011 0001 Here the total no. of 1’s are 13. Thus to provide even parity r1 = 1.

Of bits in code is k + r, then r must be able to indicate at least k + r + 1 different states. Of these, one state means no error and k + r states indicate the location of an error in each of the k + r positions. Redundant (r) bits Data (k) bits Total k + r = n bits Fig. 18 Alternatively, we can say the k + r + 1 status must be discoverable by r bits; and r bits can indicate 2r different states. Therefore, 2r must be equal to or greater than k + r + 1: 2r > k + r + 1 The value of r can be determined by plugging in the value of k (the length of data unit).